FIG. 1 schematically illustrates a conventional DSL line interface. In a DSL system, the same transmission line is used for bi-directional communication between a telephone company's central office (CO) and a remote terminal (RT) or customer premises equipment (CPE). Communication from a CO to an RT/CPE is referred to as “downstream,” while communication from an RT/CPE to the CO is referred to as “upstream.” Signals used for ADSL communication, for example, discrete mulitone (DMT) signals, are allocated by their frequency depending upon the direction of communication. Typically, in ADSL systems using frequency division multiplexing (CDM), a higher and wider frequency range, for example, 160 kHz to 1.1 MHz, is allocated to the downstream communication, and a lower and narrower frequency range, for example, 30 kHz to 138 kHz, is allocated to the upstream communication. A CO side transceiver transmits a transmit signal Tx in the downstream communication and receives a receive signal Rx in the upstream communication.
At a CO side, as shown in FIG. 1, the transmit signal Tx is typically supplied from a digital signal processing (DSP) processor 1 through a digital to analog converter (DAC) 2 to a transmit signal filter 3. The transmit signal filter 3 complies with ADSL transmission mask specifications so as to provide sufficient filtering in the transmit direction. The transmit signal Tx is then supplied with sufficient voltage and current by the line driver 5, and then coupled via a transformer 7 to a transmission line 9. The transformer 7 includes the primary 7a and the secondary 7b, and has a turns ratio of 1:n. The transmission line 9, such as a telephone line or twisted-pair loop, has a certain line impedance Z (typically 100 Ω).
The receive signal Rx is sensed using back termination resistors 11 and supplied to a line receive amplifier 13 through a resistive bridge network 15. The line receive amplifier 13 sums the receive signal Rx and the attenuated transmit signal Tx seen at the secondary 7b of the transformer 7 with a weighted, opposite phase transmit signal Tx seen at the line driver output. This weighted summing of the transmit signal Tx ideally cancels the 180° out-of-phase signal, leaving only the receive signal Rx at the receive amplifier output. This function is called as “echo cancellation” or hybrid rejection. The line receive amplifier 13 also provides a gain to the receive signal Rx before passing it to a receive signal filter (low-pass filter) 17. The receive signal Rx is then supplied to the DSP 1 through an analog-to-digital converter (ADC) 18.
As shown in FIG. 1, the transmit signal filter 3, the receive signal filter 17, the DAC 2, and the ADC 18 are typically integrated in an analog front end (AFE) chip 19, and the hybrid function is implemented using the resistive bridge network 15 and the off-chip line receive amplifier 13. Since the echo cancellation is not always ideal in an actual implementation, the line receive amplifier 13 is required to have a sufficiently large dynamic range in order to handle an out-of-band echo when the hybrid rejection is poor.
It is desirable to integrate the line receive amplifier 13 into the AFE chip 19 in order to reduce the number of off-chip (external) components. In addition, an on-chip amplifier can be made programmable so as to control its gain and/or other characteristics. In this case, however, the on-chip line receive amplifier has to operate using the same supply voltage as that of the AFE chip 19. However, since the AFE chip supply voltage is typically lower than that of an off-chip line receive amplifier 13, an on-chip line receive amplifier may not be able to provide a necessary dynamic range and gain when the echo cancellation is insufficient. That is, a large echo entering the AFE circuit limits the gain of the receive amplifier to a low value, or even requires attenuation of the receive signal. In addition, since the input-referred noise of the receive amplifier usually increases at a lower gain, it will reduce the receiver sensitivity.
Therefore, it would be desirable to provide an architecture which reduces an input-referred noise when the hybrid rejection is poor. Furthermore, it would also be desirable to provide these advantages in a simple, cost-effective manner.